TSTE17 - System Design, CDIOThis course gives a better understanding of how a large system is developed iteratively using models ranging from high abstraction level down to an implementable model. A large signal processing system (the digital base band processing of IEEE 802.11a WLAN) is studied and modelled, and finally is an FPGA implementation created. An advanced fast prototyping system based on Simulink is used. The project is carried out using the LIPS project model.
News2021-09-08: Lecture his thursday 9/9 10-12 describes LIPS and is given using zoom, meeting id 69607479766 passcode 391120. 2021-08-27: First lecture will be given using zoom, meeting id 68051307114 passcode 811104.
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Last updated: 2021-09-08