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TSTE17 - System Design, CDIO

This course gives a better understanding of how a large system is developed iteratively using models ranging from high abstraction level down to an implementable model. A large signal processing system (the digital base band processing of IEEE 802.11a WLAN) is studied and modelled, and finally is an FPGA implementation created. An advanced fast prototyping system based on Simulink is used. The project is carried out using the LIPS project model.


2022ht: Course is canceled this year due to lack of attending students. Note however that the lecture on Lips is still given (Thursday 8 September 2022 10-12 in R23).

Page responsible: Kent Palmkvist
Last updated: 2022-08-24