Welcome to the internal ISY pages

B-huset

The Department of Electrical Engineering (Institutionen för systemteknik, ISY) is central in our engineering programmes both for base knowledge and applied courses. The research is primarily focused on industrial needs and reaches from foundational questions to more application-centered issues.

Undergraduate education

The department offers more than 100 different courses within four undergraduate education areas: Images, Electronics, Automatic control, and Telecommunication. Within the university’s programs there are a number of specialisations coordinated by us.

Research

Research and research education is performed within the subject areas: Computer vision and learning systems, Electronics and computer engineering, Vehicular systems, Information coding, Communication systems och Automatic control.

Master’s thesis

Here you can read about how to find and finish a Master’s thesis with us.

Thesis defenses

2026-09-10 kl 10:00 i Transformen

Evaluation of Embedded Scalable Platforms (ESP) – A Case Study on RISC-V Processor and HLS Accelerator Integration

Författare: Mari Jenn Barcebal Cabalquinto
Opponent: Zihan Li
Handledare: Abdolvahab Khalili Sadaghiani
Examinator: Jose Nunez-Yanez
Nivå: Avancerad (30hp)

Modern heterogeneous system-on-chip (SoC) architectures increasingly combine
general-purpose processors with specialized hardware accelerators. Frameworks such as
the Embedded Scalable Platform (ESP) aim to simplify the development of such systems
by providing reusable architectural components, standardized interfaces, and automated
accelerator-integration mechanisms. However, the practical usability of the complete ESP
development workflow depends not only on these architectural abstractions, but also on
the surrounding development environment, external CAD tools, configuration procedures,
and debugging process.
This thesis evaluates ESP from a practical developer and system-integration perspective through an engineering case study. An ESP-based heterogeneous SoC was configured using an Ibex 32-bit RISC-V processor and a custom General Matrix Multiplication
(GEMM) accelerator implemented using high-level synthesis (HLS).
2026-09-10 kl 10:00 i Transformen

Implementing a Graph Neural Network Accelerator on a Resource-Constrained FPGA – A Case Study on the Reliability of High-Level Synthesis Resource Estimates

Författare: Zihan Li
Opponent: Mari Jenn Barcebal Cabalquinto
Handledare: Abdolvahab Khalili Sadaghiani
Examinator: Jose Nunez-Yanez
Nivå: Avancerad (30hp)

Graph neural networks combine sparse, irregular aggregation over a graph’s edges
with dense matrix multiplication, and FPGA accelerators for them are typically developed
and evaluated on large, capable devices. This thesis ports one such accelerator, SGRACE,
onto a substantially smaller one — the Zynq-7020 of a PYNQ-Z2 board — and determines
whether a real FPGA implementation and bitstream can be produced there, and at what
cost.
2026-09-10 kl 15:15 i Stora Visionen

Self-Supervised Learning for Repeat-Pass Sonar Imagery: A DINO-Based Approach

Författare: August Gustafsson
Handledare: Pavlo Melnyk
Examinator: Leif Haglund
Nivå: Avancerad (30hp)
2026-09-11 kl 13:15 i Systemet

Learning from Reality - Evaluating SABIM for Semantic 3D Segmentation on Buildings

Författare: Alexander Josefsson
Opponent: Nils Forssén
Handledare: Bryan Adams
Examinator: Per-Erik Forssén
Nivå: Avancerad (30hp)
2026-09-14 kl 10:15 i Systemet

Single-bit Frequency Modulation Transmitter on an Altera FPGA Board

Författare: Erik Håkansson, Hamza Keifo
Handledare: Oscar Gustafsson
Examinator: Anders Nilsson
Nivå: Grundnivå (16hp)
2026-09-14 kl 13:00 i Nollstället (ISY)

Design of Ring Oscillator-Based Differential Capacitive Sensor for Life Science Application

Författare: Ramkumar Paramasivam
Opponent: Simon Eldridge
Handledare: Saghi Forouhi
Examinator: Alireza Saberkari
Nivå: Avancerad (30hp)