TSIU03 - Labs

The course includes 4 laboratories. In the labs you will learn how to use advanced computer tools to implement hardware circuits. Making use of these tools and the knowledge from the lectures and assignments, you will program your design on the DE2-115 FPGA board and see that the FPGA works according to the specified behavior.

Labs are done in groups of two students. You sign up for lab groups during the first lecture. The lab groups are fixed throughout the course.

The location of the labs is the room Muxen4 (one stair up)

Materials for the labs are available in the course folder K:\TSIU03\Labs.

Preparation of the labs: Read and understand the lab manual. For lab 3 and 4, there are plenty of knowledge you must understand, be prepared to read parts of the manual several times. You can start the lab on your own before the session. VHDL code can be entered in any text editor, in any computer in the university. Seriously - make sure you prepare well for lab 3.

• Lab 1 Intro. Preparation: No.
• Lab 2 Keyboard. Preparation: Some.
• Lab 3 VGA. Preparation: Yes.
• Lab 4 Audio codec. Preparation: Yes.

Deadlines for the labs are as follows:

• Lab 1 and 2: Monday 2022-09-12. You must pass those two labs to be allowed to do the project.
• Lab 3 and 4: Wednesday 2022-09-28. Any remaining labs can be presented after the project, with much higher requirement on understanding.

You can download a free version of the Quartus tool here. We are using version 13.0sp1 in the labs.