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TSEA44 - Computer Hardware, a System on a Chip


Almost all electronics today are based on one or several processors rather than pure ASIC/hardware solutions. Many systems also have very specific demands on the design, e.g. real time processing of video or sound. It is often necessary to use both dedicated harware and a (commercially available) processor to achieve this performance.

The lectures and labs in this course focuses on "soft" computers on chip. To achieve the wanted functionality, we both use custom instructions and custom accelerators

Course goals

The primary goal of this course is to give experience in how a computer may be used as a component in a more sofisticated system. We further give insight in how an application specific computer system can be designed to acheive the targets in processing performance, response time, testability, and so on. Methods for these are code optimizations, addition of custom instructions, and the use of hardware accelerators. Some methods for extracting which instructions/accelerators to add is touched upon.

Other goals are (among other) to give a knowledge base in system infrastructure for communication on-chip, e.g. buses and networks.


You will definitely need a thorough understanding of

  • Digital logic design. You will design both a data path and a control unit for an accelerator.
  • Binary arithmetic. Signed/unsigned numbers.
  • VHDL or Verilog. SystemVerilog (SV) is the language used in the course. A subset of SV is however easy to learn if you have understood VHDL/Verilog.
  • Computer Architecture. It is extremely important to understand how a CPU executes code. You will also design part of a DMA-controller. Bus cycles are central.
  • Asm and C programming. Most of the programming is done in C, with a few cases of inline asm.

You will also need some understanding of

  • Signal processing. JPEG compression, which involves the DCT transform, is used as an example.
  • The Linux operating system, which is run on both the FPGA computer and the development PC.

Page responsible: Kent Palmkvist
Last updated: 2022-10-17