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Information TSEA44

Planning

The course consists of 8 lectures and 5 labs. The theme in the course is embedded computer systems with a focus on system-on-chip solutions. The lectures discuss - among other things - computer architectures for embedded systems, optimizations of the system/programs, communications between subsystems, I/O, and accelerators. The theoretical part of the course is also meant to increase the level of understanding and make the labs easier.

IMPORTANT: The first lab task (lab 0) must be carried out individually, and presented to the lab supervisor no later than 15 November 2022. This is a prerequisit for the following labs.

Labs

The labs will focus on implementation of a computer system on silicon and how this system can be optimized. The optimization is done on several levels, both in software and with accelerating hardware.

During the labs you will work with an FPGA-board (se picture below). You will run a computer system on this board, based on the OpenRisc 1200 from OpenCores. The labs will guide you from executing a simple program to running a complete Linux system!


A simple image processing application will function as the common denominator for the lab series. To achieve the performance required to run the application you will need to adapt the computer system.

The hardware is implemented using Verilog. Verilog is a hardware description language just like VHDL. Verilog is in general simpler than VHDL and is used (almost exclusively) in the US industry.

A lot of the Verilog used in the labs originate from OpenCores. OpenCores is an initiative to promote open-source for hardware and there are a large number of different IP blocks available for download on their website.

Staff 2019

Name
Lecturer Kent Palmkvist
Lab Assistant Cheolyong Bae

Informationsansvarig: Kent Palmkvist
Senast uppdaterad: 2022-10-17