TSTE16 - Mixed-Signal Processing Systems

What are Mixed-Signal Processing Systems?

Where are they found?

Mixed-signal processing systems are very commonly used and are actually needed in every system that process both analog and digital signals, in particular in the interfaces between analog and digital signal processing.

As an example, Fig.1 shows a block diagram of the signal processing performed by a radio tranceiver, (for example a hand-held multimedia terminal, a radio modem or a radar tranceiver). A major part of the tranceiver is the mixed-signal block, where a conversions back and forth between analog and digital signals are made.

Figure 1. A radio tranceiver, containing a mixed-signal processing subsytem.
A typical mixed-signal system may contain an integrated analog anti-aliasing filter with corresponding control circuitry, and an analog-to-digital converter with possible error correction or self-calibration preceeding a digital signal processing block. The processed digital data is often then reconstructed into an analog signal by a digital-to-analog converter followed by an analog reconstruction filter.

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Examples on Course Contents:

System Design and Partitioning:

The system performance is degraded by the introduced magnitude and phase distortion (linear effects), noise, and spurious distortion (nonlinear effects). The overall system requirements besides signal bandwidths, sample rates, and spectral masks etc are signal-to-noise ratio and spurious-free-dynamic range which measures the noise and distortion degradation, respectively.

Given the overall system requirements, you will learn how to design the mixed-signal system in a top down fashion, deriving specifications for subblocks and iteratively refine the design models by including practically important effects and sources of error. These errors are combated by applying approriate techniques like tuning, compensation, and predistortion.

Analog-to-Digital Conversion:

You will learn to understand ADCs and some of the most important ADC architectures and their limitations.

Figure 2. A four-bit flash ADC designed by Erik Säll (Div. of Electronics Systems) with friends.

Comparators:

Comparators are used to compare two voltage levels and are key components in analog-to-digital converters. Comparators can divided into three classes; single-stage, multi-stage, and regenerative comparators. A single-stage and a multi-stage comparator are shown in Figs. 3 and 4, respectively.

Figure 3. An amplifier as a single-stage comparator.

Figure 4. A two-stage comparator.

One important aspect in comparator design is to make a suitable trade-off between the resolution and the speed as well as the required design effort. Single-stage comparators are easier to design than multi-stage comparators, but their performance is not as good as their multi-stage counterparts. For example, the speed-resolution is determined by the total DC gain and the dominant or equivalent first pole.

For a single-stage comparator gain and pole frequency are determined by the unity-gain of the amplifier. However, for the multi-stage comparator the DC gain of the total comparator increases exponentially with the number of stages while the equivalent first pole decreases linearly with the number of stages. Hence, increasing the number of stages yields better speed-resolution trade-off.

You will learn to understand the trade-offs, the relevant performance metrics, and how to model and design comparators.

Digital-to-Analog Conversion:

You will learn to understand DACs and some of the most important DAC architectures and their limitations.

Figure 5. A 14-bit current-steering DAC with dynamic element matching, designed by Ola Andersson and Niklas Andersson and the Div. of Electronics Systems.

Tuning of Analog Filters:

When limiting the distortion that is inevitably introduced during sampling (continuous-time to discrete-time conversion) and reconstruction (discrete-time to continuous-time conversion) of wideband noisy signals, analog filters are inevitable. Due to various errors like processing errors, temperature drift, component ageing etc, these analog filters will have a frequency response that deviates from the desired one. In order to limit such deviations and make the filter response more robust, the filters must be tuned. One tuning scheme that adjusts the filter time constants is shown in Fig.4.

Figure 6. A tuning circuit for online programmable analog filters. The circuit tunes the time constant RC.

The principle of the tuning procedure in Fig.6 is to compare the time difference between the discharging and chargeing of the integrator capacitance C0. The time required for the charge and discharge phases are proportional to the value of R and C respectively and the difference is used to form an appropriate tuning code. The tuning code may then be used to perform appropriate adjustments of the capacitor (or resistor) values used in the filter by using programmable circuits.

The position of the switches are indicated in the timing diagram shown in Fig.7. The tuning procedure starts by closing the switch C in order to discharge the tuning capacitor . Next the circuit is configured as an RC-integrator by closing B. The resulting output (at node V0) is a negative ramp starting at the analog ground (Vag) and continuing for a fixed time of 2^N*Tclk . Here N is equal to the number of bits in the counter and Tclk is the input clock period. The slope of this ramp is proportional to R in this case.

Next, the circuit is configured as an SC integrator and at the same time the counter is started. During the SC integration we will have a positive slope at the integrator output node. At some time later the voltage will cause the comparator to switch and the counter is stoped. Since the slope of the second ramp is dependent on the value of C, the value of the counter will depend on the slope of these two ramps, i.e., the value of the counter is a measure of the time constant, RC.

Figure 7. Time-waveform diagram for the tuning circuit operation.


Figure 8. Chip photo of an integrated active-RC filter. Tuning is commonly used to achieve high performance filtering. The filter was designed by R. Hägglund and E. Hjalmarson, at the Div. of Electronics Systems.