TSEA26 - Design av inbyggda DSP-processorer
Important informationIf you have any questions about this course you can contact Oscar Gustafsson, Hus-B Rum 3B:546, phone 284059, email@example.com, you can also contact the lab assistant Erik Bertilsson Hus-B Rum 3B:522.
The Goal of the CourseTo give students design experiences in ASIP (Application Specific Instruction-set Processors), e.g. embedded DSP processors and DSP firmware, as well as system integration. If you are interested in building efficient hardware, this is the course for you!
- Fundamentals of Signal Processing
- Fundamentals of Computer Hardware and Architecture
- Some of the labs require a basic understanding of VHDL or Verilog
- The teaching language will be English
Organization and Requirements
There are 3 hp from the laboratory work and 3 hp from the written examination. All lab work will be done in the ISY computer labs in the B building. In order to take the labs, you have to be registered to the course first. Unregistered students will not be allowed to the labs due to limited seats.
Informationsansvarig: Oscar Gustafsson
Senast uppdaterad: 2018-09-07