TSEA26 - Design av inbyggda DSP-processorer
If you want, you are welcome to visit me (room 3B:556) and check your results 09.30 to 11.30, and 12.30 to 13.30 on Monday, 23rd October.
The reference answers of the exam is here.
Important informationAndreas Ehliar is no longer the examiner for this course, the new examiner for autumn 2017 is Dake Liu. If you have any questions about this course you can contact Dake Liu Hus-B Rum 3B:556, phone 281256, email firstname.lastname@example.org, you can also contact the teaching staff Oscar Gustafsson, Hus-B Rum 3B:546 or Erik Bertilsson Hus-B Rum 3B:522.
The Goal of the CourseTo give students design experiences in ASIP (Application Specific Instruction-set Processors), e.g. embedded DSP processors and DSP firmware, as well as system integration. If you are interested in building efficient hardware, this is the course for you!
- Fundamentals of Signal Processing
- Fundamentals of Computer Hardware and Architecture
- Some of the labs require a basic understanding of VHDL or Verilog
- The teaching language will be English
Organization and Requirements
There are 3 hp from the laboratory work and 3 hp from the written examination. All lab work will be done in the ISY computer labs in the B building. In order to take the labs, you have to be registered to the course first. Unregistered students will not be allowed to the labs due to limited seats.
Informationsansvarig: Dake Liu
Senast uppdaterad: 2017-10-19