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Homework TSTE12
To pass on the handin exercises it is required to reach 9 correct exercises out of 12 available (first 3 handin sets) on each of theory and code exercises. Each handin set contains of four theory and four coding tasks. For the retake (handin set 5) is no previous correct answers included in the calculation.
All theory subquestion answers are submitted in one submission using the comment section in lisam submission system (no file is expected). Coding tasks have one submission for each subquestion. Submission of theory answers should indicate which question and its corresponding answer on a single line each such as:
Remember that filenames for coding tasks are case sensitive. See the coding task definitions for more details.
QA: 2 QB: 1
Note that Part 5 is a separate handin, where 6 correct theory and 6 correct coding tasks are reqiured for a pass.
Work only in the TSTE12handin shell. This shell is started using the TSTE12handin command. The expected directory structure is automatically created when you start the TSTE12handin shell.
An example of how to use this is the following command sequence:
module load courses/TSTE12
TSTE12handin
The TSTE12handin shell is started. In that you can then edit,
compile and simulate your coding answers. Edit using one of
emacs INL1_KA.vhdl
gedit INL1_KA.vhdl
vi INL1_KA.vhdl
To compile use
vcom -93 INL1_KA.vhdl
To simulate start the simulator using
vsim
To upload the final code use any suitable web browser (e.g., firefox, chromium-brower).
Note the time schedule!
Exercises must be in place and compiled at latest by deadline.
Solutions will be available on the webpage earliest 1 hour efter deadline
| Handin | Handed out | Exercises due by | |
|---|---|---|---|
| Part 1 | Monday 16 September 2024 | - | Monday 23 September 2024 at 23:30!! |
| Part 2 | Monday 30 September 2024 | - | Monday 7 October 2024 at 23:30!! |
| Part 3 | Monday 14 October 2024 | - | Monday 21 October 2024 at 23:30!! |
| Completions (Part 4) | Monday 28 October 2024 | - | Monday 4 November 2024 at 23:30!! |
| retake 1 (Part 5, separate set, larger number of questions) |
The theory results will be available on the lisam submission system, in the same place where you enterd your answers
The coding results will be available in the lisam submission system, in same place where you uploaded the code.
Please take notice of:
Handins should be solved individually.
Theory exercises are sent in on this webpage.
Code exercises should be saved in your home directory as specified!!
Read the instructions carefully!!
Ask if any difficulties or uncertainty!!
Errors will result in incorrect exercise!!!
Make sure that you have
- design file saved under correct filename (remember .vhdl extension!)
- correct entity and architecture names
- correct entity and architecture connections
- compiled AND simulated the code (checking is always done by first compiling the source)
- all names and datatypes are correct!! (bit is not the same as std_logic!)
- understood the exercise and behaviour
- If a signal X is vector, it should be denoted just X.
Access of single bit positions can be done by, eg x(0).
- Do not use microsoft word or other text editors that does not create clean text files.
- all required packages included.
- VHDL version 1993 assumed, as it is the default in modelsim
Handin exercises Group lists and grades
- Current list of passed tasks will be available in the Lisam course room
Informationsansvarig: Kent Palmkvist
Senast uppdaterad: 2025-01-16
