module tb;

   logic clk,rst;
   logic [1:0] square_out;
   logic [15:0] addr;
   logic [7:0]  data;
   logic        button;
   
   squarewave dut(.*);


   always begin
      clk = 0;
      #250;
      clk = 1;
      #250;
   end

   initial begin
      button = 0;
      rst = 1;
      #5005;
      rst = 0;

      #40000;
      button = 1;
      #45000;
      button = 0;
   end

   integer fd;

   initial begin
      fd = $fopen("out.hex","wb");
   end

   always begin
      #22675;    // Sample output regularly (but not necessarily synchronous with the clock)
      case(square_out)
	2'b00:	 $fwrite(fd,"e000\n");
	2'b01:	 $fwrite(fd,"0000\n");
	2'b10:	 $fwrite(fd,"0000\n");
	2'b11:	 $fwrite(fd,"2000\n");
      endcase // case (square_out)
   end
   

   localparam freq = 2000000;
   
   // scale: 262, 277, 294, 311, 330, 349, 370, 392, 415,440,466, 494
   localparam [15:0] C  = freq / 2 / 262;
   localparam [15:0] Cs = freq / 2 / 277;
   localparam [15:0] D  = freq / 2 / 294;
   localparam [15:0] Ds = freq / 2 / 311;
   localparam [15:0] Eb = freq / 2 / 311;
   localparam [15:0] E  = freq / 2 / 330;
   localparam [15:0] F  = freq / 2 / 349;
   localparam [15:0] Fs = freq / 2 / 370;
   localparam [15:0] G  = freq / 2 / 392;
   localparam [15:0] Gs = freq / 2 / 415;
   localparam [15:0] A  = freq / 2 / 440;
   localparam [15:0] As = freq / 2 / 466;
   localparam [15:0] Bb = freq / 2 / 466;
   localparam [15:0] B  = freq / 2 / 494;
   

   // ROM
   logic [15:0] tmp;
   always_comb begin
      case (addr[15:1])
`include "tb_song.vh"
	default: begin
	   if(addr[15:1] > 15'h1b6e) begin
              $fclose(fd);
	      $finish;
	   end
	end
      endcase // case (addr)
   end

   always_comb begin
      data = 16'hxxxx;
      if(addr[0]) begin
	 data = tmp[15:8];
      end else begin
	 data = tmp[7:0];
      end
   end

endmodule // tb