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Verilog-A Modelling

There are a large number of blocks already implemented in the library ahdlLib. Feel free to use them in your model (Just make sure they have the function you expect them to have). Look at the code to learn how to write Verilog-A code.

For information about Verilog-A, choose "help" -> "Cadence Documentation" in the "icfb" window, scroll down to "Verilog-A".

There is a Verilog-A code debugger in the simulator. In the "Affima Analog Circuit Design Environment" window choose "Simulation" -> "Netlist and Debug AHDL".

Transistor Corners

During fabrication the strength and speed of transistors varies. To take this into account at the design phase the manufacturers provide a set of process corners. You should simulate your design in process corners to make sure your design is robust.

The corners provided with ams 0.35um are:
cmostm - Typical mean parameters
cmosws - Worst case speed, the transistors are slower and weaker then typical
cmoswp - Worst case power, the transistors are faster and consumes more power then typical
cmoswo - Worst case one, the PMOS transistors are slower and the NMOS transistors are faster the typical
cmoswz - Worst case zero, the NMOS transistors are slower and the PMOS transistors are faster the typical

To change process corner choose "Setup" -> "Model Libraries" in the "Affima Analog Circuit Design Environment" window. The row controlling which set of cmos transistor parameters to use is the one ending with "/cmos53" Choose this line and change "section (opt.)" to the corner you want to use. Press Change and apply.

There is another important parameter that changes the transistor behaviour, the temperature. Higher temperature makes the transistor slower and lower temperature (reasonably low) makes it faster. To change temperature choose "Setup" -> "Temperature" in the "Affima Analog Circuit Design Environment" window.

We strongly recommend you to at least simulate at cmostm 27 degrees, cmosws 100 degrees and cmoswp 0 degrees.

Known Bugs in the Design Kit

Note that when using variables as transistor parameters (width and length), the capacitances associated with the transistor are not updated. They are only updated if the width and length are numeric values. This means that the capacitances are calculated from the last numeric value that was specified.


Senast uppdaterad: 2014-06-03